The invention relates to computers and representative of the computers which can implement the invention has been the IBM S/390 system, but it could be another system. Such a system would have a Fixed Point Unit for the computer, or FXU, which acts as the integer execution unit of the Central Processor (CP) unit of the computer system, be it an IBM S/390 system, or that of other systems. The Fixed Point Unit (FXU) contains an Arithmetic and Logical Unit (ALU) which is capable of performing arithmetic functions such as binary addition, subtraction, as well as logical operations such as logical and, logical or, and logical exclusive or. These logical operations are bit maskable which means that a mask is used to select which bits of the operands participate in the logical operation. The unselected bits of the result are left unchanged. This mask is either explicitly specified in the instruction text as the location of the beginning and ending bit positions of a contiguous mask or the instruction may implicitly require a mask. The mask is also used for a variety of other instructions including shift operations and stores. The execution of the logical operation is serially gated by the construction of the mask. We found that it was not possible to reduce the processor cycle time without increasing the number of cycles required to perform the bit maskable operations until we discovered our improved method described below.